Communicating information via the internet and other digital communications systems has become common in the United States and elsewhere. As the number of people using these communications systems has increased so has the need for transmitting digital data at ever increasing rates.
As will be understood by persons skilled in the relevant arts, digital communications systems are designed, for example, using look-ahead, pipelining, and parallelism techniques. These known techniques have enabled engineers to build digital communications systems, using available manufacturing technologies, which operate at data rates in excess of 1 Gb/s. These known techniques, however, cannot always be applied successfully to the design of higher speed digital communications systems. Applying these techniques is particularly difficult when dealing with nested feedback loops or multiplexer loops.
The use of look-ahead, for example, for fast computation of recursive loops is known. However, there are several approaches that can be used in applying look-ahead in the context of a multiplexer loop such as, for example, the multiplexer loop of a decision feedback equalizer found in modern transceivers. Many of these approaches will not improve the performance of the digital circuit to which they are applied, and some of these approaches can even degrade circuit performance. In similar fashion, the application of known pipelining and parallelism techniques to nested feedback loops or multiplexer loops in high speed digital communications systems will not necessarily result in improved performance.
There is a current need for new design techniques and digital logic circuits that can be used to build high-speed digital communication systems. In particular, design techniques and digital logic circuits are needed which can be used to build digital communications circuits that operate in excess of 2.5 Gb/s.